NXP Semiconductors /MIMXRT1062 /CCM /CCGR6

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Interpret as CCGR6

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0CG00CG10CG20CG30CG40CG50CG60CG70CG80CG90CG10 0CG11 0CG12 0CG13 0CG14 0CG15

Description

CCM Clock Gating Register 6

Fields

CG0

usboh3 clock (usboh3_clk_enable)

CG1

usdhc1 clocks (usdhc1_clk_enable)

CG2

usdhc2 clocks (usdhc2_clk_enable)

CG3

dcdc clocks (dcdc_clk_enable)

CG4

ipmux4 clock (ipmux4_clk_enable)

CG5

flexspi clocks (flexspi_clk_enable) sim_ems_clk_enable must also be cleared, when flexspi_clk_enable is cleared

CG6

trng clock (trng_clk_enable)

CG7

lpuart8 clocks (lpuart8_clk_enable)

CG8

timer4 clocks (timer4_clk_enable)

CG9

aips_tz3 clock (aips_tz3_clk_enable)

CG10

sim_axbs_p_clk_enable

CG11

anadig clocks (anadig_clk_enable)

CG12

lpi2c4 serial clock (lpi2c4_serial_clk_enable)

CG13

timer1 clocks (timer1_clk_enable)

CG14

timer2 clocks (timer2_clk_enable)

CG15

timer3 clocks (timer3_clk_enable)

Links

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